| 摘要 |
PROBLEM TO BE SOLVED: To enable photolithography reticle design pattern correction without any enormous additional experiment by identifying the position of a selected feature edge, finding an optical proximity correction value for the edge, and embedding the correction value in a layout design and forming a reticle design. SOLUTION: Which integrated circuit design level is an object of optical proximity correction is determined and a design layout of single level is selected for correction (S702). An initial layout design for the selected layout level is obtained and its features are scanned (S704). After a current edge is identified, coordinates which are related to the current edge are generated (S706). The coordinates are evaluated by an obtained nonlinear mathematical expression to determine an optical proximity correction degree for the current edge and then the current edge is corrected (S708, 710). When the current IC design layout has no edge and further has a design level, a next design level is obtained (S712, 714, 716). |
