| 摘要 |
PROBLEM TO BE SOLVED: To form a high-performance J-FET element in a simple manufacturing process by a method, wherein an N-channel J-FET element is formed in a P-type well region and the element is formed, using in common each region of an NPN transistor. SOLUTION: A P-type well region 26 is formed in an N-type epitaxial layer 25. A gate contact region 29 of a J-FET element in the region 26 is formed simultaneously with the formation of a base region 28 of an NPN transistor. Moreover, source and drain regions 31 and 32 of the J-FET element are formed simultaneously with the formation of an emitter region 30 in the region 28. An N-type channel region 33 and a top gate region 34 are formed within the region encircled by the region 29. A P+ embedded layer 23 is formed in the lower part of the region 26.
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