发明名称 TIMING SIGNAL GENERATOR FOR TELEVISION RECEIVER
摘要 PROBLEM TO BE SOLVED: To generate a more stable vertical pulse signal by making jitter of various vertical timing signals possible to be cancelled by sampling a vertical synchronizing signal by a horizontal synchronizing signal according to various signals. SOLUTION: The vertical synchronizing signal is first delayed in a phase in which no problem is caused by the jitter from a sampling point of the horizontal synchronizing signal by a delay circuit 12. Next, a timing signal based on the vertical synchronizing signal of a video signal is generated by sampling the delayed vertical synchronizing signal by a clock signal by a vertical address counter 17.
申请公布号 JP2000165699(A) 申请公布日期 2000.06.16
申请号 JP19980347853 申请日期 1998.11.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 SAKANISHI YASUAKI
分类号 H04N5/12;(IPC1-7):H04N5/12 主分类号 H04N5/12
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