发明名称 METHOD FOR DIVIDING INSPECTING SEQUENCE OF SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR GENERATING THE INSECTING SEQUENCE
摘要 PROBLEM TO BE SOLVED: To easily divide a large scale fault inspecting sequence into a plurality of divided inspecting sequences, even in a partial scan designed or non-scan designed semiconductor integrated circuit by adding a state transition sequence transitable to an identifying inner state identified, so that a second divided inspecting sequence becomes significant for a head of the second divided inspecting sequence. SOLUTION: An internal state decided by a combination of input values from external inputs is identified, so that second divided inspecting sequences of a rear side which is divided become significant, thereby to decide the identified inner state, and thereafter the state is validated so as to become the identified inner state from an initial state. Then, after a state transition sequence has transited to the identified inner state is generated, the transition sequence is added to the head of the second divided inspecting sequences. Thus, even if a fault simulation is conducted by using the second divided sequence, the inner state of the first divided sequences when the fault simulation is finished agrees with that of the second divided sequences at the start of fault simulation.
申请公布号 JP2000162279(A) 申请公布日期 2000.06.16
申请号 JP19980335459 申请日期 1998.11.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HIRAOKA TOSHIHIRO;HOSOKAWA TOSHINORI
分类号 G01R31/28;G01R31/3183;G06F17/50;(IPC1-7):G01R31/28;G01R31/318 主分类号 G01R31/28
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