| 摘要 |
PROBLEM TO BE SOLVED: To provide a flat display device preventing deterioration in display quality such as that contrast is lowered partially from occurring. SOLUTION: The signal line drive circuit of this liquid crystal display device is provided with a shift register 1, a shift control circuit 2, OR gates 31-3n, buffers 41-4n and an analog switch 5, and the shift register 1 is provided with a first register group 11 and a second register group 12. The first register group 11 shifts successively a start pulse. The second register group 12 shifts successively the register output of the final stage of the first register group 11. When the shift pulse is outputted from the register of the final stage of the second register group 12, all analog switches 5 are turned on, and all video bus lines L1-Ln are set in middle potential synchronized with this timing. Thus, all signal lines are precharged to the middle potential in a blanking interval.
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