| 摘要 |
<p>PROBLEM TO BE SOLVED: To rapidly and surely read out the block propriety information by providing the memory cells, which are vertically and horizontally arrayed in response to the rows and columns and the propriety information storage means, which are prepared for the memory cells excluding the one that stores the application propriety information on the memory cells. SOLUTION: A bad block storage means 40 includes a bad block storage part 41, a Y gate 42 and a sense amplifier 43, and the Y gates 42 and 28 are used to perform switching between a bad block storage part 41 and a memory cell array 26. These gates 28 and 42 are switched to each other, in response to the command signals or high voltage signals which are supplied to a control circuit and a high-voltage circuit 22. The means 40 is required to hold a reduced quantity of data as compared with the array 26 and accordingly can relax its design rule. Furthermore, the means 40 does not need to read out every block, when a block propriety information table is produced and can significantly cause the number of pieces of data to be read out to decrease for attaining high speed processing.</p> |
