| 摘要 |
PROBLEM TO BE SOLVED: To simultaneously execute access operation and refresh operation by activating a first word line, latching the data from a bit line group transferring the data read out of a selected memory cell to a first sense amplifier group via a first switch means and transferring the data to a first common data line. SOLUTION: An address AD is made to hold to a row address buffer 11 as a row address RA1, and a word line WL1 selected by a row decorder 12 becomes a high level. A sense amplifier drive signal SE1 becomes high level, and makes the sense amplifier group 13 an operation state, and makes amplify the data on a sense line pair group (S1, *S1) and a bit line pair group (B1, *B1) with the sense amplifier group 13, and holds the data by one row on the bit line. A pre-charge signal PR1 is set to high level for a memory cell array in a bank 1, and the bit line group (B1, *B1) is precharged to a potential Vcc/2.
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