发明名称 METHOD, DEVICE AND SYSTEM FOR TEST
摘要 <p>PROBLEM TO BE SOLVED: To check the normality of a device by detecting a unit signal for test by inputting and selecting both a valid unit signal for transmitting valid information and an invalid unit signal for transmitting no information. SOLUTION: The valid and invalid cells of input data IC3 and IC4 from azimuths 1 and 2 are respectively inputted through monitor cell inserting circuits 21 and 22 to input terminals 1 and 2 of a selector 25. On the other hand, the outputs of the inserting circuits 21 and 22 are respectively inputted through a valid cell detecting circuit 24 to a control signal input terminal C of the selector 25 as a selector control signal SC1. The selector 25 selectively outputs only the valid cell containing a monitor cell and abandons the invalid cell. Then, the output of the selector 25 is sent out to the next step in ATM transmission equipment, on which a test device 10 is loaded, or the outside as output data OC1 and additionally received by a monitor cell detecting circuit 26 as well, it is monitored for each monitor cycle whether the monitor cell is detected or not and when no monitor cell is detected, the presence of any fault around the system of respective azimuths 1 and 2 is estimated.</p>
申请公布号 JP2000165383(A) 申请公布日期 2000.06.16
申请号 JP19980338712 申请日期 1998.11.30
申请人 OKI ELECTRIC IND CO LTD 发明人 YAMASHITA TOSHIYA;TAKEDA TERUTO
分类号 H04L12/26;H04L12/28;(IPC1-7):H04L12/26 主分类号 H04L12/26
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