发明名称 |
PICTURE DISPLAY DEVICE |
摘要 |
PROBLEM TO BE SOLVED: To reduce the scale of a device by reducing a chip area while using a character ROM in common occupying the chip area most in a display controller. SOLUTION: This controller is provided with a first timing generator 5 generating a a timing signal which is needed for displaying a first display layer and a second timeing generator 16 generating a timing signal which is needed for displaying a second display layer and a shift register 18 which performs the parallel-to-serial conversion of the second display layer to output the second layer and a synthesizing circuit 15 synthesizing the first display layer and the second display layer to output them.
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申请公布号 |
JP2000163033(A) |
申请公布日期 |
2000.06.16 |
申请号 |
JP19980339979 |
申请日期 |
1998.11.30 |
申请人 |
MITSUBISHI ELECTRIC CORP;MITSUBISHI DENKI SYSTEM LSI DESIGN KK |
发明人 |
TAKAISHI IZUMI;MATSUMOTO MASAYUKI |
分类号 |
G09G5/00;G09G5/22;G09G5/377;H04N5/445;H04N5/66;(IPC1-7):G09G5/00 |
主分类号 |
G09G5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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