发明名称 MULTICHIP MODULE
摘要 PROBLEM TO BE SOLVED: To reduce an occupancy area and thickness and thereby increase the packaging density of a stacked multichip module by installing a semiconductor chip with downward connection pads and a semiconductor chip with upward connection pads. SOLUTION: This module is provided with a stacked lower semiconductor chip 110 and an upper semiconductor chip 120, upward connection patterns 131, 132 formed on a base substrate, and a package for storing the lower and the upper semiconductor chips 110, 120. The lower semiconductor chip 110 is set with downward connection pads, and the upper semiconductor chip 120 is set with upward connection pads. The lower semiconductor chip 110 are connected to the connection patterns 131 through the connection pads 110 of a bump (solder ball) structure, while the upper semiconductor chip 120 are connected to the connection patterns 132 through the connection pads 121 of a bonding structure. Thereby, the occupancy area can be reduced and height lowered (thin type), and packaging density can be increased.
申请公布号 JP2000164796(A) 申请公布日期 2000.06.16
申请号 JP19980337271 申请日期 1998.11.27
申请人 NEC CORP 发明人 ASAZAWA HIROSHI
分类号 H01L23/12;H01L23/31;H01L23/52;H01L25/065;H01L25/07;H01L25/18 主分类号 H01L23/12
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