发明名称 MEMORY CONTROL SYSTEM
摘要 PROBLEM TO BE SOLVED: To prevent accesses from being concentrated to a specified memory board while preventing the expansion of circuit scale and degradation in the performance of the entire system. SOLUTION: When an address signal AD is outputted from an address generating circuit 51, this signal AD is simultaneously inputted to the respective decode circuits of memory boards 1-3 and the respective decode circuits respectively secure memory areas corresponding to the address AD in memory blocks 12, 22 and 33. In the case of data write, high-order 16 bits of data D to be written are stored in the memory block 12, low-order 16 bits are stored in the memory block 22, and ECC code is stored in the memory block 32. Since data are divided into three and respectively stored in the different memory boards 1-3, accesses can be prevented from being concentrated to the specified memory board.
申请公布号 JP2000163315(A) 申请公布日期 2000.06.16
申请号 JP19980338698 申请日期 1998.11.30
申请人 NEC ENG LTD 发明人 KAMIJO FUMIHIRO
分类号 G06F12/16;G06F12/06;(IPC1-7):G06F12/06 主分类号 G06F12/16
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