发明名称 BURIED PLATE FORMING METHOD
摘要 PROBLEM TO BE SOLVED: To fairly decrease a manufacture step, reduce all process times, and enhance device performance characteristic by a method wherein, before a second layer of an undoped material is vapor-deposited on a first layer containing a dopant, the first layer is not brought into contact with an air. SOLUTION: A silicon nitride layer 102 is vapor-deposited on a silicon wafer 100, and a trench 104 is formed by plasma-etching therein. Next, a first arsenic- doped glass layer 106 is formed by LPCVD of arsenic-doped glass by use of tetraethyl arsenate within the trench 104 and on the silicon nitride layer 102. Next, a second layer 108 of glass undoped by LPCVD is vapor-deposited on the first glass layer 106 by use of ortho-tetraethyl silicate. Incidentally, before the undoped second glass layer 108 is formed, the arsenic-doped first glass layer 106 must not be exposed to an element reacting involuntarily with arsenic therein, in particular an air.
申请公布号 JP2000164823(A) 申请公布日期 2000.06.16
申请号 JP19990101488 申请日期 1999.04.08
申请人 SIEMENS PLC 发明人 KOFFLER GUENTHER;WENSLEY PAUL
分类号 H01L27/108;H01L21/225;H01L21/28;H01L21/334;H01L21/8242 主分类号 H01L27/108
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