发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To surely and stably set the test mode of a semiconductor integrated circuit device without depending on the source voltage. SOLUTION: A test mode input circuit 15 comprises an NOMS transistor(TR) 22, a PMOS TR 23, an inverter 24, and a current-limiting circuit 25. A boosted power VCP generated by a boosted power circuit is supplied to the gate of the TR 23, and when one connection part of the TR 23 becomes higher than the boosted power VCP as a result of the input of an Extra-High signal, having a voltage higher than a source voltage setting the test mode, the TR 23 is turned on, so that a test mode activation signal CEH is outputted from the output part of the inverter 24 to a command decoder. Thus, the Extra-High signal can be detected without depending on the source voltage.</p>
申请公布号 JP2000163998(A) 申请公布日期 2000.06.16
申请号 JP19980335187 申请日期 1998.11.26
申请人 HITACHI LTD 发明人 SATO HIROSHI
分类号 G01R31/28;G01R31/26;G01R31/3185;G11C16/06;G11C17/00;G11C29/00;G11C29/14;(IPC1-7):G11C29/00;G01R31/318 主分类号 G01R31/28
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