发明名称 NONVOLATILE SEMICONDUCTOR STORAGE DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To suppress variation of threshold voltage in a memo erasing state by setting all word lines of a memory cell array in the non-selective states after an erasing operation is executed and detecting whether every memory cell has its threshold voltage of a normal erasing state or an excessive erasing state that is lower than a prescribed level, as compared with the normal erasing state. SOLUTION: Address initialization is executed after an erasing operation and it's decided whether or not any memory transistor TR of an excessive erasing state exists. If a memory TR of an excessive erasing state is detected, a reversing operation is executed to reset the threshold voltage at a prescribed level and the presence of an excessive erasing state is discriminated. Only a bit line, including a memory TR of an excessive erasing state, has a reversing operation with use of a leak detection means which detects an excessive erasing state. Thus, the variation is suppressed in the erasing state of a memory cell, and the reliability is improved for a nonvolatile semiconductor storage device.</p>
申请公布号 JP2000163978(A) 申请公布日期 2000.06.16
申请号 JP19980334840 申请日期 1998.11.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAGAYAMA TATSUKI
分类号 G11C16/02;G11C16/04;(IPC1-7):G11C16/02 主分类号 G11C16/02
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