| 摘要 |
PURPOSE: A GS-bus dual interface structure is provided to support a communication line between processors in a distributed control system of a switching system, specially to inform a receiving data line status of a standby side by checking data train of an active and standby side at an IPC communication. CONSTITUTION: A GS-bus dual interface structure includes a standby bus test logic for testing an error occurrence of the standby bus by comparing a transmission data, input into a transceiver, with a standby bus data loop-backed. The standby bus test logic comprises standby bus data comparison detectors(25,26,27) and a standby bus error status register(28). The standby bus data comparison detectors(25,26,27) compares the data bit train of the transmission data with the looped-back standby bus data bit train. The standby bus error status register(28) receives the error detection result from the standby bus data comparison detectors(25,26,27), and sends the result to a CPU(10).
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