发明名称 SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: A synchronous memory device is provided to reduce the current amount dissipated during auto refresh operation. CONSTITUTION: The device includes a memory cell array(100), the first device(200), the second device(300) and a control circuit(400). The memory cell array(100) stores predetermined information. The first device(200) generates an internal signal synchronized with an outer clock signal which is implied from outside. The second device(300) detects whether a column address strobe signal, a row address strobe signal and the outer signal are in activated at the same time to generates an auto refresh signal which is set active during the auto refresh operation synchronized with the internal clock signal. The first device is inactivated during the auto refresh signal generated at the second signal is activated and is activated during the auto refresh signal generated at the second signal is inactivated to generate the internal clock signal. The control circuit(400) controls the peripheral circuits(500) which operate memory cell array manipulation synchronized by the internal clock signal output from the first device.
申请公布号 KR100259974(B1) 申请公布日期 2000.06.15
申请号 KR19970013515 申请日期 1997.04.12
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 SHIN, CHOONG-SUN
分类号 G11C11/407;(IPC1-7):G11C11/407 主分类号 G11C11/407
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