| 摘要 |
PURPOSE: A dynamic memory test circuit address generation method and a system thereof are provided to simply generate the addresses for testing a dynamic memory not using upper addresses and middle addresses among the all the usable addresses by using a self test circuit. CONSTITUTION: The system comprises an upward counter(40), an inverter(42), the first multiplexor(44) and the second multiplexor(46). The upward counter(40) performs the upward counting as an N bit binary counter, and outputs the counted value as an n bit address for testing the dynamic memory. The inverter(42) inverts the output from the upward counter(40), and outputs the inverted N bit address to the first multiplexor(44) to obtain the addresses inversely generated. A BIST(Built-In Self Test) controller determines testing the dynamic memory while decreasing the address or increasing the address according to a current stage value input via a stage counter. The second multiplexor(46) inputs the test address selected in the first multiplexor(44), and selectively outputs an m bit row address column and an n bit column address.
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