发明名称 COLUMN REDUNDANCY CONTROL CIRCUIT
摘要 PURPOSE: A column redundancy control circuit is provided to use a cell used as a parity bit as a column redundancy cell to increase the usability of the device. CONSTITUTION: The circuit includes the first logic operator(10), the second logic operator(20) and the third logic operator(30). The first logic operator receives an enable signal and a column address, performs logic operation on the received signal and address and forms a path of a column address used for a parity bit. The second logic operator receives the inverted enable signal and the column fuse address, performs logic operation on the received signal and address and forms a path of a column fuse address used for parity bit. The third logic operator receives the outputs of the first and second logic operators, performs logic operation on the received outputs and outputs a signal corresponding to a column address for parity bit or a column redundancy address.
申请公布号 KR100258901(B1) 申请公布日期 2000.06.15
申请号 KR19970081265 申请日期 1997.12.31
申请人 HYUNDAI ELECTRONICS IND. CO., LTD 发明人 SHIN, HYUN-MI
分类号 G11C29/00;(IPC1-7):G11C29/00 主分类号 G11C29/00
代理机构 代理人
主权项
地址