| 摘要 |
PURPOSE: A frequency detecting circuit is provided which includes a charging means and a discharging means capable of being fabricated by a CMOS process, controls the discharging means using a clock signal to discharge voltage charged in the charging means in proportional to frequency, and detects that the charged voltage becomes less than a reference value to display the detected result as a digital signal. CONSTITUTION: A frequency detecting circuit includes a level shift detector for generating a pulse signal with a predetermined pulse width whenever an input clock signal is level-shifted, and a level detector. The level detector has a charging means, a discharging means operated by the pulse signal to discharge charges that are charged in the charging means, and an inverter for receiving an electric signal based on the quantity of the charges charged in the charging means to invert the electric signal.
|
