| 摘要 |
PURPOSE: A system and a method for connecting a high speed microprocessor to a backplane are provided to compensate for an error of a process speed occurred between the high speed microprocessor and the low speed microprocessor so that it can enhance a reliability of recording or reading data. CONSTITUTION: The system comprises a high speed microprocessor(110), a transmission buffer(130), a low speed one chip microcomputer(120) and a receiving buffer(140). The high speed microprocessor(110) outputs instruction, data and addresses corresponding to a record or read request and reads data when a read completion signal is transmitted. The transmission buffer(130) outputs a blank flag according to a record state of the instruction, data and addresses, and buffers the instruction, data and addresses. The low speed one chip microcomputer(120) checks the blank flag via a periodic polling operation, analyzes the recorded instruction, processes the data and addresses according to the analysis result of the instruction, and outputs the read data and the read completion signal if the read data is offered from a slot.
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