| 摘要 |
1,072,554. Electronic counters. LICENTIA PATENT-VERWALTUNGS G.m.b.H. Nov. 28, 1963 [Nov. 28, 1962], No. 47059/63. Heading G4A. Each stage of a binary or binary-coded decimal counter comprises a main store such as S A0 and an auxiliary store such as S H0 controlled respectively by main and auxiliary count signals interlaced in time, provision being made to clear the counter and then to set it to a predetermined number before counting begins. As in Specifications 1,072,552 and 1,072,553, the main counting pulses t 1 and inverse pulses t 1 are applied to AND gates controlling the main stores S A0 -S A3 , as also are preset-release signal f and the inverse of clearing signal #l. The auxiliary counting pulses t 2 are applied to AND gates controlling the auxiliary stores S H0 -S H3 . The main and auxiliary stores are interconnected by the AND gates. Counting commences with the first t 1 pulse following the beginning of a count release signal z 2 applied to the first main store S A0 and ends with the first t 2 pulse following the end of the signal Z 2 . Presetting.-To preset the counter all stages are cleared by a signal l = l (#l = 0) after which a pre-adjust release lead f is marked together with the necessary leads k 0 -k 3 . |
