Memory control apparatus having data retention capabilities

摘要

A first sense amplifier reads from a first memory cell array at a normal equilibrium point between a read-"0" operation and a read-"1" operation. A second sense amplifier detects data dissipation by reading data at an equilibrium point higher than the normal equilibrium point, from a second memory cell array provided for detection of data dissipation and having the same characteristic as the first memory cell array. An interrupt control circuit issues an interrupt request to a CPU so as to stop its operation. Subsequently, in response to an instruction from a memory overwrite control circuit, a write/read/erasure control circuit overwrites data stored in the first memory cell array.