Solid-state image sensing apparatus and its driving method

摘要

An electronic still camera requires a solid-state image sensing apparatus capable of providing a higher-speed pickup image signal having a high vertical resolution. In a line reducing operation to reduce the number of lines of the pickup image signal to be output by applying read-out pulses to read-out gate units located at predetermined intervals in order to read out only signal electric charge from sensor units for picture elements arranged in the vertical direction on some lines, a vertical CCD is driven by a combination of a pair of vertical transfer clock signals +526 V1 (+526 V1') and +526 V3 (+526 V3') having phases opposite to each other and another pair of vertical transfer clock signals +526 V2 and +526 V4 also having phases opposite to each other, allowing the overlap period twice the vertical transfer clock signals to be lengthened.