High speed sensing circuit for a memory device

摘要

A sensing circuit for sensing the binary state of a memory cell in a non-volatile memory device that includes an amplifier electrically connected to the memory cell and current generating circuitry connected to the amplifier for generating a first current in response to one binary state of the memory cell and a second current in response to another binary state of the memory cell. The sensing circuit also includes circuitry to speed initialization of the current generating circuitry and circuitry to prevent transient noise in the output of the sensing circuit during initialization of the current generating circuitry.