发明名称 Semiconductor package substrate with power die
摘要 An apparatus that efficiently delivers electrical power and lowers the inductance to an integrated circuit. In one embodiment, the present invention includes an apparatus for delivering electrical power to an integrated circuit comprising two planes, substantially parallel to one another, having many ground and power traces. The ground and power traces of the separate planes are connected together and connected to the integrated circuit, thereby providing power to the integrated circuit. In each individual plane, the ground and power traces are substantially parallel to each other, one array of traces in one plane substantially perpendicular to another array of traces in another plane. The apparatus being electrically coupled to a printed circuit board having at least one decoupling capacitor with first and second electrodes coupled to at least two of the ground and power connections, respectively, of the integrated circuit through the printed circuit board, and the first and second ground and power planes.
申请公布号 US6075285(A) 申请公布日期 2000.06.13
申请号 US19970990705 申请日期 1997.12.15
申请人 INTEL CORPORATION 发明人 TAYLOR, GREGORY F.;GEANNOPOULOS, GEORGE L.;MOSLEY, LARRY E.
分类号 H01L23/498;H01L23/64;H05K1/02;(IPC1-7):H01L23/52 主分类号 H01L23/498
代理机构 代理人
主权项
地址
您可能感兴趣的专利