发明名称 EEPROM CELL WITH TUNNELING ACROSS ENTIRE SEPARATED CHANNELS
摘要 An EEPROM cell is described that is programmed and erased by electron tunneling across an entire portion of separate transistor channels. The EEPROM cell has three transistors formed in a semiconductor substrate. The three transistors are a tunneling transistor (PMOS), a sense transistor (NMOS) and a read transistor (NMOS). Electron tunneling occurs to program the EEPROM cell through a sense tunnel oxide layer having a thickness to allow the electron tunneling across an entire portion of a sense channel upon incurrence of a sufficient voltage potential between a floating gate and the tunnel channel. Electron tunneling also occurs to erase the EEPROM cell through a tunnel oxide layer having a thickness to allow electron tunneling across an entire portion of a tunneling channel upon incurrence of a sufficient voltage potential between the floating gate and the tunneling channel.
申请公布号 WO0033384(A1) 申请公布日期 2000.06.08
申请号 WO1999US28344 申请日期 1999.11.30
申请人 LATTICE SEMICONDUCTOR CORPORATION 发明人 LI, XIAO-YU;FONG, STEVEN, J.
分类号 G11C16/04;H01L21/8247;H01L27/115 主分类号 G11C16/04
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