发明名称 BOUNDARY SCAN METHOD FOR TERMINATING OR MODIFYING INTEGRATED CIRCUIT OPERATING MODES
摘要 A JTAG Boundary Scan method by which the on-chip system logic (OCSL) of an integrated circuit is changed by use of a state machine which, among other functions, allows a predefined set of instructions (80, 89) to be loaded into an Instruction Register and then executed. The predefined instructions (80, 89) are designed to follow in sequence after certain other previous instructions. The instructions (80, 89) change the OCSL from one state to another state and allows the state to be changed without the need of a full device reset. Additional instructions within this invention were created to have attendant operating modes for which termination is self timed within the integrated circuit. Additional instructions further control the implementation of instruction execution within the state machine.
申请公布号 WO0033094(A1) 申请公布日期 2000.06.08
申请号 WO1999US17349 申请日期 1999.07.29
申请人 ATMEL CORPORATION 发明人 RAMAMURTHY, SRINIVAS;FAHEY, JAMES, JR.;TAM, EUGENE, JINGLUN;GONGWER, GEOFFREY, S.
分类号 G01R31/28;G01R31/3185;G06F11/22;(IPC1-7):G01R31/28 主分类号 G01R31/28
代理机构 代理人
主权项
地址