| 摘要 |
<p>Phase lock loop systems in which a phase offset is introduced between a reference signal (SR) and a loop signal (SO) to improve linearity. The phase offset is produced by a linearizing network (40) inserted in the phase lock loop between a phase discriminator (10) and a loop filter (12). The linearizing network (40), which may be part of a charge pump circuit (40) receives adjustment signals (46) according to characteristics of the phase lock loop output signal (45) or the loop signal (SO). For example, distortion or noise levels in these signals may be monitored or minimized.</p> |
