发明名称 Power-saving clock control apparatus and method
摘要 A clock control type information processing apparatus of the invention selects clock frequency according to load state, which reduces electric power consumption without substantially reducing the effective performance of the program. The clock control type information processing apparatus including a central processing unit for executing programs and a plurality of peripheral processing units connected to the central processing unit using a bus, includes a clock generating unit for generating clock signals having a plurality of frequencies and selectively supplying any one of the clock signals to the central processing unit and the peripheral processing units, a bus access monitoring unit for monitoring load state of the bus which connects the central processing unit with the peripheral processing units; and a clock selection control unit for generating control signals to control the clock frequencies generated by the clock generating unit according to the load state of the bus.
申请公布号 US6073244(A) 申请公布日期 2000.06.06
申请号 US19980128969 申请日期 1998.08.04
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 IWAZAKI, YASUO
分类号 G06F1/06;G06F1/08;G06F1/32;(IPC1-7):G06F1/32 主分类号 G06F1/06
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