发明名称 |
SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF |
摘要 |
PROBLEM TO BE SOLVED: To raise the integration degree of elements without causing the degradation of the performance of a MOS field-effect transistor. SOLUTION: This manufacturing method is a method for manufacturing a MISFET(Metal Insulator Semiconductor Field-Effect Transistor) of a structure, wherein in the case where impurities for short-channel effect inhibition are doped in a semiconductor substrate 1 obliquely to the main surface of the substrate 1, gate electrodes 3 and 3 adjacent to each other are arranged so that the impurities, which are doped in the substrate 1 from the direction intersecting the electrodes 3, are not doped between the electrodes 3 and 3 and the electrodes 3 and 3 are arranged so that a source region of the MISFET is arranged between the electrodes 3 and 3. |
申请公布号 |
JP2000156419(A) |
申请公布日期 |
2000.06.06 |
申请号 |
JP19980250865 |
申请日期 |
1998.09.04 |
申请人 |
HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD |
发明人 |
ASAKURA HISAO;TADAKI YOSHITAKA;SEKIGUCHI TOSHIHIRO;NAGAI AKIRA;MIYAMOTO MASABUMI;NAKAMURA MASAYUKI;MIYATAKE SHINICHI;SUZUKI SHINKO;HIYOUMA MASAHIRO |
分类号 |
H01L21/8234;H01L21/265;H01L21/336;H01L21/8238;H01L21/8242;H01L27/088;H01L27/10;H01L27/108;H01L29/49 |
主分类号 |
H01L21/8234 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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