发明名称 SAMPLING CLOCK AUTOMATIC ADJUSTMENT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a device that automates adjustment of the frequency and the phase of a sampling clock, when a digital video signal is employed. SOLUTION: This automatic adjustment device is provided with an A/D converter section 101, that receives and samples a video signal for converting the signal into digital video signal data, a storage section 102 that stores the video signal data, an arithmetic processing section 107 that reads the video signal data for adjusting the frequency and phase of a sampling clock, a sampling clock generating section 105 that generates and outputs the sampling clock, a frequency control section 106 that controls the setting a frequency of the sampling clock from the sampling clock generating section 105 by receiving frequency control data from the arithmetic processing section 107, a delay section 103 that supplies a signal delaying the sampling clock to the A/D converter section 101, and a phase control means 104 that applies setting control of the delay in the sampling clock in the delay section 103 to the control data from the arithmetic processing section 107.
申请公布号 JP2000156795(A) 申请公布日期 2000.06.06
申请号 JP19980330368 申请日期 1998.11.20
申请人 NEC CORP 发明人 UEDA TAKUYA
分类号 H04N5/14;(IPC1-7):H04N5/14 主分类号 H04N5/14
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