| 摘要 |
A circuit in a memory device for precharging at least one bit line before a data read operation of the memory device is complete. The circuit includes a sense amplifier having at least one input and at least one output. The bit line is connected to the input of the sense amplifier via column decode logic, and a precharge circuit is connected to the bit line. An input keeper is connected to the sense amplifier inputs and is in communication with the precharge circuit and column decode logic. The input keeper holds a content of the bit line at the sense amplifier inputs and causes the precharge circuit to precharge the bit line as the content of the bit line propagates to the output of the sense amplifier.
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