发明名称 |
Semiconductor memory device |
摘要 |
A semiconductor memory device comprises a memory cell array with a plurality of blocks having a plurality of memory cells arranged in a matrix, a plurality of address latch circuits provided so as to correspond to the blocks, a row decoder that accesses the memory cell array in blocks according to the latched state of the plurality of address latch circuits, and a control circuit for accessing the memory cell array by latching all of the blocks to the selected state and then canceling the address latching of the selected block to the unselected state.
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申请公布号 |
US6072719(A) |
申请公布日期 |
2000.06.06 |
申请号 |
US19970843721 |
申请日期 |
1997.04.17 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
TANZAWA, TORU;TANAKA, TOMOHARU |
分类号 |
G11C8/12;(IPC1-7):G11C16/00 |
主分类号 |
G11C8/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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