发明名称 Memory device having data bus lines of uniform length
摘要 A memory device comprises data bus lines whose lengths and widths are uniform. The memory device can minimize the lengths of the data bus lines and reduce the time delay, the skew between signals and the current consumption by uniformly disposing the data bus lines to each block in each bank, wherein each bank contains a plurality of blocks therein.
申请公布号 US6072744(A) 申请公布日期 2000.06.06
申请号 US19990343565 申请日期 1999.06.30
申请人 HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. 发明人 KWEAN, KI CHANG
分类号 G11C7/10;G11C7/18;(IPC1-7):G11C8/00 主分类号 G11C7/10
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