| 摘要 |
A digital integrator is disclosed that provides a wide dynamic range and extremely fast clearing of previous integration results. The digital integrator includes an analog-to-digital converter that generates a series of digitized representations of an electrical signal and further includes an ALU that generates an integration result by adding successive digitized representations in the series throughout an integration interval. The digital integrator includes circuitry for clearing the integration result from the ALU after completion of the integration interval in preparation for a subsequent integration interval on the electrical signal.
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