发明名称 Semiconductor device output buffer circuit for LSI
摘要 In a semiconductor device having a plurality of output circuits such as a semiconductor memory device, a drive signal having a boosted voltage level which is produced from a boosting circuit is applied to a gate of a low-level outputting MOS transistor in the output circuit. As a result, even when a potential at the ground wiring line is floated, a substantial decrease of a potential difference between the ground wiring line and the gate of the low-level outputting MOS transistor can be prevented. Also, a signal having a sufficiently high level can be supplied to a gate of a low-level outputting output MOS transistor. As a consequence, delays in the switching operation of the output MOS transistor can be suppressed, and the output circuit can be operated at high speed.
申请公布号 US6072354(A) 申请公布日期 2000.06.06
申请号 US19970939334 申请日期 1997.09.29
申请人 HITACHI, LTD.;HITACHI DEVICE ENGINEERING CO., LTD. 发明人 TACHIBANA, TOSHIKAZU;SAKAI, TAKESHI;NAKAGOME, YOSHINOBU
分类号 H03K19/017;(IPC1-7):H03K17/16 主分类号 H03K19/017
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