| 摘要 |
PURPOSE: A test pattern structure is provided to lower fabrication cost of a semiconductor device without preparing an additional wafer for measuring a misalignment and to be applied to the common fabrication process of the semiconductor device. CONSTITUTION: A structure of a test pattern is composed of pairs of conductive layer patterns, plural high resistors(R1,R2,R3,R4), a first pad(PAD1), plural wires(T6,T7,T8), and a second pad(PAD2). Herein, the conductive layer patterns are consisted of first conductive layer patterns(P11,P12,P13,P14) and second conductive layer patterns(P21,P22,P23,P24). The high resistors are corresponding to the pairs of conductive layers one by one, and the first pad is connected to one(P11) of first conductive layer patterns. The wires connect the first conductive layer pattern of pairs of conductive layer patterns to the second conductive pattern of a pair of conductive layer patterns, and the second pad is connected to the high resistors. Thus, the first conductive pattern and the second conductive pattern in pairs of the conductive layer patterns are horizontally separated for a certain distance. Herein, the separated distance is gradually increased from pairs of conductive layer patterns formed at the rim of one side directly connected with the first pad to the pairs of the conductive layer patterns formed at the rim of the other side. Therefore, the misalignment is measured by a synthetic resistance value measured from the first and the second pads. |
