| 摘要 |
PURPOSE: A semiconductor memory cell is provided to form four memory cell transistors on one bit line and to form four memory cell transistors on one word line. CONSTITUTION: A DRAM memory cell is composed of a semiconductor substrate, a word line(32), a first ILD layer having a first contact hole(37), plural capacitors formed on the first ILD layer, a second ILD layer having a second contact hole, and a bit line(38). Herein, the semiconductor substrate is defined as first, second, third, and fourth active areas, and the word line is formed in a line shaped second pattern while being partially contacted to a first pattern. Then, the bit line is formed by connecting to the second contact hole while being perpendicular to the second pattern of the word line. Threshold voltages in the first to the fourth active areas are different from one another to form four memory cell transistors in one word line. Moreover, the four memory cell transistors are formed in one bit line to improve the integration of the device.
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