| 摘要 |
The hardware structure and software structure of an information processor are simplified. A central processing unit (30) and a first semiconductor memory (32) storing programs executed by the central processing unit (30) are connected to a bus (31). A second semiconductor memory (32) storing firmware and a 3 third semiconductor memory (36) storing newly generated data are connected to the bus (31) through a selective connection means (33). By referring to the selection register (33a) of the selective connection means (33), one of the second semiconductor memory (35) and the third semiconductor memory (36) is connected to the bus (31).
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