发明名称 Phase alignment method between clock signal and data input signal, involving optimizing input data transition flank to fall in center of sampling window to allow higher sampling frequency
摘要 The method involves the input data signal being sectioned into elements of width equal to a fraction of the clock period, by sampling of the input signal using phase shifted signals derived from the principal clock signal. The data bits obtained by this process are observed via a window of width equal to one input data bit. The window is displaced so that the data bit leading flank transition is the center of the window, and the data flow observed is transmitted to pipelines in which they undergo a parallel treatment, assuring the extraction of the bits that they contain.
申请公布号 FR2786632(A1) 申请公布日期 2000.06.02
申请号 FR19980014991 申请日期 1998.11.27
申请人 TEXAS INSTRUMENTS FRANCE 发明人
分类号 H03L7/081;(IPC1-7):H03K5/156;G06F5/00;H03K19/20 主分类号 H03L7/081
代理机构 代理人
主权项
地址