| 摘要 |
<p>PCT No. PCT/DE95/00031 Sec. 371 Date Jul. 15, 1996 Sec. 102(e) Date Jul. 15, 1996 PCT Filed Jan. 12, 1995 PCT Pub. No. WO95/19642 PCT Pub. Date Jul. 20, 1995To produce a three-dimensional circuit arrangement, a first substrate (1) is thinned, stacked onto a second substrate (2) and fixedly connected to the latter. The first substrate (1) and the second substrate (2) in this case each comprise circuit structures (12, 22) and metallization planes (13, 23). At least one first contact hole (16) and one second contact hole (4) are opened, which reach the metallization plane (13, 23) in the first substrate (1) and second substrate (2), respectively, the second contact hole (4) passing through the first substrate (1). The metallization planes (13, 23) of the two substrates (1, 2) are electrically connected to one another via a conductive layer (7).</p> |
