SYSTEM FOR DETECTING PEAK VALUE OF INPUT SIGNAL AND OFFSET CANCELLING METHOD

摘要

PROBLEM TO BE SOLVED: To remove offsetting effects by permitting a storage capacitor which is connected to the first input of a comparator via an input capacitor and is connected to the output to generate voltage and permitting an output buffer to buffer capacitor voltage and to supply it to the second input of the comparator. SOLUTION: A storage capacitor CHOLD is charged to a voltage setting close to VDD. When a clock signal PHI1 becomes low and PHI2 becomes high, switches S3 114 and S4 116 close, a switch S1 110 opens and voltage remains on an input capacitor C1. When PHI1 becomes high, the switch S1 110 closes and analog input voltage VIN is made to pass through a terminal to which a comparator 102 is inverted. The comparator 102 compares voltage in a terminal to be inverted with voltage in a terminal which is not inverted. The output of the comparator 102 depends only on the input voltage VIN of a peak detector 100 and the output voltage VOUT of a buffer 108. Thus, the offset is canceled.