摘要 |
PROBLEM TO BE SOLVED: To provide a D/A conversion circuit whose conversion precision can be enhanced without the need for a buffer circuit for weighting purpose where a deviation due to weighting of an output voltage in low-order bits produced resulting from parallel connection between a resistance array for low-order bits and resistors for generating a reference voltage is avoided. SOLUTION: This circuit has m-sets (m is an integer being one or over) of high-order input terminals 1, n-sets (n is an integer being one or over) of low-order input terminals 2, an output terminal 3, a 1st output line 4, a 2nd output line 5, a high-order side decoder 6, a low-order side decoder 7, a D/A converter 8, a 1st operational amplifier 9 and a 2nd operational amplifier 10. The 1st operational amplifier 9 receives a division voltage across a unit resistor 11 being a component of a 1st resistance array 12 and gives its output to a 2nd resistance array 14 as its reference voltage.
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