发明名称 SIGNAL PROCESSOR
摘要 PROBLEM TO BE SOLVED: To realize reproduce at a double speed without imposing a load on a program even in the case of a sampling frequency whose division frequency is not an integer. SOLUTION: Output data of an A/D converter circuit 10 are written in a buffer circuit 11 based on a write clock, where a written clock number is counted. In response to the count result, a read number is set, and the buffer circuit 11 reads data according to a read clock and a read clock number is counted.
申请公布号 JP2000152188(A) 申请公布日期 2000.05.30
申请号 JP19980320686 申请日期 1998.11.11
申请人 SANYO ELECTRIC CO LTD 发明人 TOKIZAWA HARUYUKI
分类号 G06F5/06;G11B20/02;H03M1/12;H04N5/93;(IPC1-7):H04N5/93 主分类号 G06F5/06
代理机构 代理人
主权项
地址