| 摘要 |
PROBLEM TO BE SOLVED: To prevent a bit line from being thinned or broken without causing short circuit thereof by forming a part of coarse wiring pattern wider than a tight wiring pattern and forming the wide part of the wiring pattern while spacing apart constantly from the tight wiring region. SOLUTION: Bit lines 2, 3 are arranged periodically and tightly and one half bit lines 3 are led out from the cell array end part and wired. Consequently, the density of the bit line 3 is halved on the outside of a memory cell. In the peripheral region, the bit line 3 is connected with an underlying diffusion layer through a contact 4. The line width is designed wide (B>A) at the lead-out part from the cell array. The wide part of wiring pattern is spaced apart by a minimum dimension A" from the tight wiring region. Contacts 4 are formed in the peripheral circuit part on same substrate while being connected with the bit lines 2, 3. |
