发明名称 SYNCHRONIZATION DETECTOR, ITS METHOD AND REPRODUCING DEVICE
摘要 PROBLEM TO BE SOLVED: To automatically detect respective data blocks of different length intermingled in a data stream. SOLUTION: Input data are fed to shift registers 10, 11 respectively corresponding to data lengths L, K where L>K and 2K>L hold. Based on a synchronization pattern in input data detected by a circuit 14, the synchronization pattern is detected in inputs and outputs of the shift registers 10, 11. A data length of signals from the circuits 10, 11 from which the synchronization pattern is detected is used for a SYNC block length. The detected SYNC information is stored in a RAM 17 from the head of the information when the length of the information is K and stored in the RAM 17 from a bit of the information by (L-K) bits from the least significant bit when the length is L. The information is fed to an inertia circuit 18 from the (2L-K)th bit from the head of the information stored in the RAM 17. When the length is K, the circuit 18 delays the information by (L-K) and outputs a resulting synchronization pulse. A delay line 19 outputs a SYNC block synchronously with the synchronization pulse.
申请公布号 JP2000152175(A) 申请公布日期 2000.05.30
申请号 JP19980317597 申请日期 1998.11.09
申请人 SONY CORP 发明人 ISOZAKI MASAAKI;OOYONE YOSHIO
分类号 H04N5/92;G11B20/10;G11B20/14;H04N5/93;(IPC1-7):H04N5/92 主分类号 H04N5/92
代理机构 代理人
主权项
地址