发明名称 Multi-layer spacer technology for flash EEPROM
摘要 A method is provided for forming multi-layer spacer GELS) for flash EEPROM devices. A composite tetraethyl orthosilicate-silicon nitride (TEOS/Si3N4) layer is deposited over the floating gate and anisotropically etched to form the MLS. The resulting MLS is better controlled dimensionally with the attendant advantage, therefore, of better definition of gate and channel lengths in the memory cell for more predictable and better programming and erase performance of EEPROMS.
申请公布号 US6069042(A) 申请公布日期 2000.05.30
申请号 US19980023065 申请日期 1998.02.13
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 CHIEN, WEN-CHENG;CHU, HUI-CHEN
分类号 H01L21/336;H01L29/423;(IPC1-7):H01L21/824 主分类号 H01L21/336
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