| 摘要 |
PROBLEM TO BE SOLVED: To reduce complexity of circuit in the material aspect and to obtain a memory cell having high access speed by feeding a current to a transistor through a capacitor. SOLUTION: A 4T/2C SRAM 60 includes a parasitic resistance reflected as a leas current from R1 71 and R2 72. The 4T/2C SRAM 60 also includes a flip-flop formed through cross coupling of two inverters and two access transistors T1 68 and T2 64. A memory cell is an intended conduction path for obtaining currents passing through the parasitic resistances R1 71 and R2 72 utilizing capacitors C1 61 and C2 62. These parasitic resistances R1 71 and R2 72 are reflected as leak currents passing through the dielectric of the capacitors C1 61 and C2 62, respectively, and compensate for some other leak current from four transistors T1 63, T2 64, T3 65 and T4 66. |
