发明名称 |
Lightly doped drain formation integrated with source/drain formation for high-performance transistor formation |
摘要 |
An integrated circuit fabrication process is provided for forming a transistor in which the source/drain areas are formed simultaneously with the lightly doped drain areas. A gate electrode including a high-K gate dielectric and a gate conductor is formed upon a semiconductor substrate. The high-K gate dielectric is then selectively narrowed relative to the gate conductor. The source/drain areas and lightly doped drain areas are formed using a single impurity implant without the need for sidewall spacers on the gate electrode. A metal silicide layer may be formed across upper surfaces of the gate conductor and source/drain areas, also without the need for sidewall spacers on the gate electrode.
|
申请公布号 |
US6069387(A) |
申请公布日期 |
2000.05.30 |
申请号 |
US19980055648 |
申请日期 |
1998.04.06 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
GARDNER, MARK I. |
分类号 |
H01L21/28;H01L21/336;H01L29/51;(IPC1-7):H01L29/76;H01L29/94 |
主分类号 |
H01L21/28 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|