发明名称 METHOD AND SYSTEM FOR EFFICIENTLY HANDLING OPERATIONS IN A DATA PROCESSING SYSTEM
摘要 A shared memory multiprocessor (SMP) data processing system includes a store buffer implemented in a memory controller for temporarily storing recently accessed memory data within the data processing system. The memory controller includes control logic for maintaining coherency between the memory controller's store buffer and memory. The memory controller's store buffer is configured into one or more arrays sufficiently mapped to handle I/O and CPU bandwidth requirements. The combination of the store buffer and the control logic operates as a front end within the memory controller in that all memory requests are first processed by the control logic/store buffer combination for reducing memory latency and increasing effective memory bandwidth by eliminating certain memory read and write operations.
申请公布号 CA2289402(A1) 申请公布日期 2000.05.30
申请号 CA19992289402 申请日期 1999.11.12
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ARROYO, RONALD XAVIER;JOYNER, JODY B.;BURKY, WILLIAM E.
分类号 G06F12/00;G06F12/08;G06F13/00;G06F13/16;(IPC1-7):G06F12/00 主分类号 G06F12/00
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